Interrupt 0 mask register.
| MASK0 | Mask CmdCrcFail flag. |
| MASK1 | Mask DataCrcFail flag. |
| MASK2 | Mask CmdTimeOut flag. |
| MASK3 | Mask DataTimeOut flag. |
| MASK4 | Mask TxUnderrun flag. |
| MASK5 | Mask RxOverrun flag. |
| MASK6 | Mask CmdRespEnd flag. |
| MASK7 | Mask CmdSent flag. |
| MASK8 | Mask DataEnd flag. |
| MASK9 | Mask StartBitErr flag. |
| MASK10 | Mask DataBlockEnd flag. |
| MASK11 | Mask CmdActive flag. |
| MASK12 | Mask TxActive flag. |
| MASK13 | Mask RxActive flag. |
| MASK14 | Mask TxFifoHalfEmpty flag. |
| MASK15 | Mask RxFifoHalfFull flag. |
| MASK16 | Mask TxFifoFull flag. |
| MASK17 | Mask RxFifoFull flag. |
| MASK18 | Mask TxFifoEmpty flag. |
| MASK19 | Mask RxFifoEmpty flag. |
| MASK20 | Mask TxDataAvlbl flag. |
| MASK21 | Mask RxDataAvlbl flag. |
| RESERVED | Reserved. Read value is undefined, only zero should be written. |